1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and in particular to a semiconductor integrated circuit chip having large load driving output circuits and small voltage amplifying circuits.
2Description of the Related Art
A semiconductor read-only memory (ROM) is a memory device in which information is stored permanently. The ROM device includes a plurality of memory cells in a memory cell array. For example, such a conventional memory device is disclosed in the paper entitled, "5V-only 256 kbit CMOS Flash EEPROM", 1989 IEE, ISSCC89, SESSION: THAM 10.3, pp. 132-133.
In such a case that data previously stored in a memory cell in a memory cell array is read out, the corresponding memory cell is specified by a selected word line and a selected bit line. Since the selected memory cell has a gate connected to a read line and a drain connected to a bit line, a current is delivered to a sense amplifier in accordance with the previously stored data. The current is converted into a voltage and amplified by the sense amplifier, and it is then transmitted to an output buffer. The data is transmitted to an output transistor from the output buffer and is then outputted from an output pad. Data stored in a semiconductor memory device are read out, the data to outputted from the output pads through the above-mentioned operation. Accordingly, sense amplifiers and output transistors are arranged at the same side on a conventional semiconductor device chip.
However, with the circuit block arrangement of the above-mentioned conventional device, since both the sense amplifiers and the output transistors are arranged in group on the same side of a chip, the impedance of ground wiring including a substrate between circuit blocks is low.
It has been known that the potential of the ground wiring fluctuates owing to a discharge current from the load upon switching of the output transistors for driving a large load. In general, dummy memory cells are used as means for realizing high-speed and wide margin for ROMs. However, in this arrangement, since a parasitic capacitive unbalance exists between sense lines (or data bus) which is the input of the sense amplifiers and the dummy lines, data may be inverted if the voltage fluctuation at the ground wiring is large. In the conventional devices, since the impedance between the sense amplifier and the output transistor is low, a small voltage amplifying circuit such as the sense amplifier is affected erroneously by noise caused by the switching of the output transistor.